Definition of Instruction and Instruction Sets in 8085 Microprocessor:
Instruction is a command or a binary pattern given to a computer to perform specific operation on given data/Operand. Instruction is actually a command to the microprocessor to perform a given task on specified data. In 8085 Microprocessor, Instructions are of 8 bit. There are 74 types of 246 instructions.The entire group of these instructions are called Instruction Sets which determines what functions the microprocessor should perform.
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Based on the nature of operation of instruction, 8085 Instruction sets can be classified as follow:
- Data Transfer Instructions
- Arithmetic Instructions
- Logical Instructions
- Rotate Instructions
- Branching instructions
- Control Instructions
A. Data Transfer Instructions:
It is the largest instruction group, It move the data from register to register, or register to memory, or memory to register, or register to I/O ports, or form I/O ports to register. But the data transfer from memory to memory is invalid. The instructions in data transfer group doesn't affect the flags.
| Mnemonics | Description | Example |
|---|---|---|
| MOV Rd,Rs | - Copies the content of source Register Rs to Destination Register Rd. - Rs and Rd can be A, B, C, D, E, H, L |
MOV A,B |
| MOV Rd,M | - Copies the content of Memory Location M to Destination Register Rd.
- Memory Location M is specified by HL register pair. |
MOV A,M |
| MOV M,Rs | - Copies the content of Source Register Rs to Memory Location M. | MOV M,A |
| MVI Rd,8-bit (Load register immediately) |
- The 8-bit data is stored in the destination register Rd | MVI A,34H |
| MVI M,8-bit (Load Memory immediately) |
- The 8-bit data is stored in the Memory Location M | MVI M,32H |
| LDA 16-bit (Load Accumulator Direct) |
- Copies the content of memory location specified by 16-bit address into Accumulator A | LDA 2070H |
| STA 16-bit (Store Accumulator Direct) |
- Copies the content of Accumulator A into 16-bit memory address | STA 2070H |
| LDAX RP (Load Accumulator Indirect) |
- Copies the content of memory location specified by register pair RP into Accumulator A. - Register pair can be B or D i.e BC or DE pair. |
LDAX B |
| STAX RP (Store Accumulator Indirect) |
- Copies the content of A into 16-bit memory address specified by register pair RP. - Register pair can be B or D i.e BC or DE pair. |
STAX B |
| LXI RP, 16-bit (Load Register Pair) |
- Loads 16-bit data into register pair. - Register pair can be B, D, or H i.e BC, DE or HL pair. |
LXI H, 2015H |
| IN 8-bit address | - The data from i/p port specified by 8-bit address is transferred into Accumulator A | IN 40H |
| OUT 8-bit address | - The data of Accumulator A is transferred into output port specified by 8-bit address | OUT 10H |
| XCHG | - Exchange the content of HL pair with DE pair i.e. the content of H and D are exchanged whereas content of L and E are exchanged | XCHG |
B. Arithmetic Instructions:
The instructions that are used for arithmetic operations.| Mnemonics | Description | Example |
|---|---|---|
| ADD R/M (add Register/Memory) |
- The content of Register/Memory(R/M) is added to the A and result is stored in A. - The memory M is specified by the HL register Pair. |
ADD B [A <= A+B] ADD M [A <= A+M] |
| ADC R/M (add with carry) |
- The content of register /memory (R/M) is added to the A along with carry flag CF and result is stored in A. - The memory M is specified by the HL register Pair. |
ADC B [A <= A+B+CF] ADC M [A <= A+M+CF] |
| ADI 8-bit (add immediate) |
- The 8-bit data is added to A and result is stored in A. | ADI 42H [A <= A+42] |
| ACI 8-bit (add immediate with carry) |
- The 8-bit data is added to A along with carry flag CD and result is stored in A. | ACI 42H [A <= A+42+CF] |
| SUB R/M (Subtract Register/Memory) |
- The content of register /memory (R/M) is subtracted from A and result is stored in A. - The memory M is specified by the HL register Pair. |
SUB B [A <= A-B] SUB M [A <= A-M] |
| SBB R/M (Subtract with burrow) |
- The content of register /memory (R/M) is subtracted from A along with borrow value and result is stored in A . - The memory M is specified by the HL register Pair. |
SBB B [A <= A-B-CF] SBB M [A <= A-M-CF] |
| SUI 8-bit (Subtract immediate) |
- The 8-bit data is subtracted from A and result is stored in A. | SUI 32H [A <= A-32] |
| INR R/M (Increment Register/Memory) |
- Increment the content of register/memory by 1. - The memory M is specified by the HL register Pair. |
INR B [B <= B+1] INR M [M <= M+1] |
| DCR R/M (Decrement Register/Memory) |
- Decrement the content of register/memory by 1. - The memory M is specified by the HL register Pair. |
DCR B [B <= B-1] DCR M [M <= M-1] |
| INX RP (Increment Register Pair) |
- Increment the content of register pair RP by 1. | INX H [HL <= HL+1] |
| DCX RP (Decrement Register Pair) |
- Decrement the content of register pair RP by 1. | DCX H [HL <= HL-1] |
See also:
Instruction and Instruction Format in 8085
C. Logical Instructions:
Logical Instructions are used to perform logical operations.| Mnemonics | Description | Example |
|---|---|---|
| CMP R/M (Compare Register/Memory) |
- Compare the content of register/memory with A. - Result of Comparison: If A < R/M : Carry Flag CY=1 If A = R/M : Zero Flag Z=1 If A > R/M : Carry Flag CY=0 |
CMP B CMP M |
| CPI 8-bit (Compare immediate) |
- Compares 8-bit data with A. - Result of Comparison: If A < 8-bit : Carry Flag CY=1 If A = 8-bit : Zero Flag Z=1 If A > 8-bit : Carry Flag CY=0 |
CPI 32H |
| ANA R/M (Logical AND register/memory) |
- The content of A are logically ANDed with the content of register/memory and result is stored in A. - Memory M must be specified by HL pair. |
ANA B [A <= A.B] ANA M [A <= A.M] |
| ANI 8-bit (AND immediate) |
- The content of A are logically ANDed with the 8-bit data and result is stored in A. | ANI 32H [A <= A.32H] |
| ORA R/M (logical OR register/memory) |
- The content of A are logically ORed with the content of register/memory and result is stored in A. - Memory M must be specified by HL pair. |
ORA B [A <= A or B] ORA M [A <= A or M] |
| ORI 8-bit (OR immediate) |
- The content of A are logically ORed with the 8-bit data and result is stored in A. | ORI 32H [A <= A or 32H] |
| XRA R/M (logical XOR register/memory) |
- The content of A are logically XORed with the content of register/memory and result is stored in A. - Memory M must be specified by HL pair. |
XRA B [A <= A xor B] XRA M [A <= A xor M] |
| XRI 8-bit (XOR immediate) |
- The content of A are logically XORed with the 8-bit data and result is stored in A. | XRI 32H [A <= A xor 32H] |
D. Rotate Instructions:
| Mnemonics | Description | Example | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| RLC (Rotate Accumulator Left) |
- Each bit of A is rotated left by one bit position. - Bit D7 is placed in the position of D0.
|
RLC | ||||||||
| RRC (Rotate Accumulator Right) |
- Each bit of A is rotated right by one bit position. - Bit D0 is placed in the position of D7. |
RRC | ||||||||
| RAL (Rotate Accumulator Left with Carry) |
- Each bit of A is rotated left by one bit position along with carry flag CY. | RAL | ||||||||
| RAR (Rotate Accumulator Right with Carry) |
- Each bit of A is rotated right by one bit position along with carry flag CY. | RAR |
See Also:
8085 Addressing Modes
E. Branching Instructions:
The group of instructions to change the sequence of a program either conditionally or unconditionally.| Mnemonics | Description | Example |
|---|---|---|
| Unconditional jump | ||
| JMP 16-bit | The program sequence is transferred to the memory location specified by 16-bit address | JMP C0005H |
| Conditional jump | ||
| JC 16-bit address | Jump on Carry (CY=1) | |
| JNC 16-bit address | Jump on no Carry (CY=0) | |
| JP 16-bit address | Jump on Positive (S=0) | |
| JM 16-bit address | Jump on Negative (S=1) | |
| JZ 16-bit address | Jump on Zero (Z=1) | |
| JNZ 16-bit address | Jump on no zero (Z=0) | |
| JPE 16-bit address | Jump on even parity (P=1) | |
| JPO 16-bit address | Jump on odd parity (P=0) | |
| JM 16-bit address | Jump on Negative (S=1) | |
| Call and Return instruction | ||
| Call 16-bit | The program sequence is transferred to the subroutine at memory location specified by the 16-bit address. | CALL COO5H |
| RET | The program sequence is transferred from the subroutine program to calling program. | RET |
E. Control Instructions:
| Mnemonics | Description | Example |
|---|---|---|
| NOP | No operation is performed. | NOP |
| HLT | The CPU finishes executing the current instruction and stops any further execution. | HLT |
So these are the 8085 Instructions sets that helps to perform different specific tasks.
Related Posts:
- 8085 Microprocessor Features, Pin Diagram, Architecture
- 8086 Microprocessor Features, Architecture
- All 8085 Instructions with Operand, Size, Addressing Mode, Machine Cycle, T-States
- Timing Diagram [8085 Microprocessor]
8085 INSTRUCTION SETS
Reviewed by Sandesh Shrestha
on
11 March
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Reviewed by Sandesh Shrestha
on
11 March
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